1. Field of the Invention
The present invention relates to a logic integrated circuit having a dynamic substitution function when a fault occurs in one fixed circuit block, by programming in a substitution circuit block the function of a fixed circuit block in which the fault is detected, thereby performing self-repair, and an information processing apparatus using the logic integrated circuit, and a dynamic substitution method of the logic integrated circuit.
2. Description of the Related Art
In a LSI (Large Scale Integration) circuit of which has highly integrated, a fault in one point may produce an extreme damage on the entire system, and bring about the suspension of system operation for a long time. To cope with such a problem, conventionally, the entire LSI circuit has been structured of FPGA (Field Programmable Gate Array), and a certain area in the FPGA is programmed into a plurality of circuit blocks having different functions, while the remaining area has been structured of substitution blocks. By the use of such a structure, it has been proposed that, when a fault occurs in one circuit block, a substitution block in the FPGA is programmed so as to perform the function of the circuit block having the fault, so as to achieve self-reconfiguration (for example, Japanese Unexamined Patent Publication No. Hei-8-044581).
Further, in an information processing unit having a plurality of fixed circuit LSIs, it has also been proposed that, with the provision of an FPGA circuit for substitution, when a fault is detected in a fixed circuit chip, a control circuit in the information processing unit programs the FPGA circuit so as to perform the function of the circuit having the fault, so as to achieve self-reconfiguration (for example, Japanese Unexamined Patent Publication Nos. Hei-7-273837 and 2000-081991.)
However, according to the first conventional art, the entire LSI is structured of less integrated FPGA having a limited number of gates, and therefore, it is difficult to obtain a large-scale circuit. Furthermore, because the overall circuit block is to be reconfigured even when a portion of the circuit becomes faulty, a substantial time is required for the reconfiguration. This impedes nonstop operation, and reduction of downtime cannot be achieved. Therefore, it is hard to apply the first conventional art to an information processing unit, such as a server, in which nonstop operation and minimization of the downtime is required.
Meanwhile, according to the second conventional art, it takes a long time for reconfiguration, because the entire circuit is to be reconfigured even when the fault occurs in a portion of the circuit. This impedes nonstop operation, and reduction of downtime cannot be achieved. Since the abnormality is decided in the control portion side, it is difficult to achieve in an LSI of complicated structure.